Robin Masih
•　　　PROJECTS　　　•　　　PROJECTS　　　•　　　PROJECTS　　　

Projects

Final Year Project: Finding Bugs in Verilog Tools thumbnail

Final Year Project: Finding Bugs in Verilog Tools

VeriGen: a novel AST-based fuzzer for stress-testing Verilog tools, exploring corner cases in synthesis and elaboration.

June 25, 2025
Third Year Project: LUMNET thumbnail

Third Year Project: LUMNET

A wireless mesh network of LED panels.

June 25, 2024