Imperial MEng Electronic and Information Engineer graduate
Specialising in computer architecture, embedded systems, and hardware design automation. Developing VeriGen, a deterministic Verilog fuzzer with C++ AST implementation for identifying behavioral inconsistencies across EDA toolchains, whilst writing about technology and infrastructure.
Deterministic Verilog fuzzer with a C++ AST implementation, identifying behavioral inconsistencies across EDA toolchains.
Self-healing wireless mesh network with synchronised LED matrices and real-time environmental monitoring.
Passenger-facing IoT system providing ambient environmental information using distributed sensor modules on London Underground.
View all projects →Articles on transport infrastructure, its intersection with politics, and other things that tickle my pickle.
Its original route was mothballed under Beeching's cuts in the 1960s, work is underway to reconstruct the Oxford to Cambridge rail line.
The M42 pilot proved smart motorways could work. The national rollout proved they weren't resourced properly. What would it take to fix the concept?
Why Bedford won Universal Studios - and the transport infrastructure (rail, roads and more) required to make it succeed.
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